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Consider:

1) SPARC was _never_ commercially competitive versus contemporaries. Not an ISA problem but they never had the design acumen other CPU makers did/do and the manufacturing partners always treated it second rate. I could stop here, there is simply no comparison or lesson in SPARC other than how not to run a business. It was successful in spite of this due to many other reasons (primarily ecosystem).

2) POWER9 is still competitive against chips just now launching 3 years later on a full step of manufacturing processes.

3) Other CPU vendors are about to hit an enormous memory wall. IBM is 4 years ahead of the industry here with OMI. Can still use cheap standard DDR4 by putting the buffers on board or on chiplets in P10. OMI submitted to JEDEC for standardization so it may be a total non-issue.

4) IBM's AXON PHY is 4 years ahead of everyone else in design and actually deployed. Glueless AI/ML/DSP nodes with GPUs or FPGAs versus i.e. nvidia DGX. Much better interconnect than infinityfabric.

5) P10, P11, and P12 are already planned. Expect future supercomputing wins especially with P11 (US gov likes to spread contracts among vendors every other generation). The enterprise POWER business is big enough to subsidize this game for a while.

If there is an error or impasse, it is that most developers now consume VMs on cloud services and for cloud operators the decision to move off x86 is a bureaucratic nightmare in the few companies that are technical enough to do it. POWER will live for a long time under IBM. The most likely outcome of this announcement is PowerISA MCUs and SoCs may see a resurgence. I can't see any trends clearly enough to predict POWER uptake outside that.



Note that the first OMI controller from Microchip (nee Microsemi) will have fully open source firmware. This is huge coming from Microsemi/Microchip ... and likely a result of IBM strongarming them for it. Even with a complete shift in memory architecture, IBM have still managed to ensure that their ecosystem is fully open and auditable - beautiful.

Also, take a look at the Protected Execution Facility (aka Ultravisor) ... it permits systems owners to separate hypervisor administration and code from guest machines and shrinks the trusted code base to almost nothing. Also, fully open source. Intel and AMD have something kind of similar but it requires proprietary firmware and trusted key signing by the vendor while IBM's design doesn't require any proprietary firmware or trusted key signing by the vendor at all. Very very cool.


Until your guests start talking to one another. Then you might have isolation but it's at the wrong level.


If your guests start talking to one another, then it still has to be permitted by the ultravisor or the network layer. Isolation is subjective and PEF/Ultravisor permit you to separate the administrators of the hypervisor from the administrators of the guest workloads. This is something you don't really get elsewhere with the same security guarantees and/or open implementation.


"SPARC was _never_ commercially competitive versus contemporaries"

They were far and away the market share leader for Unix server shipments in the late 90's and early 2000's.


Their complete systems were competitive in terms of having a good (price, features, usability, reliability, support, ...) tuple, but that doesn't mean every attribute of their systems was the best of all systems on the market. I know people who bought Solaris systems, and nobody bought it because of the CPU.

You say they were the market share leader through the "early 2000's". In 2005, their OS was open-sourced. Sure enough, everyone I knew using Solaris since then has run it on x86. People like the OS but only used SPARC when they had no choice.


Linux killed off the RISC vendors only after AMD produced a 64 bit x86 (2003).

Sun was doing quite well with Sparc prior.


They also had manufacturing problems at times. Can't remember with it was the Ultrasparc III or IV for this specific example, but when a whole bunch of CPU's were recalled because the ceramic would actually seperate from the rest of the chip once it warmed up.




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