Yeah agreed -- though that's what I meant about the zero flag: NOR instead of XOR combinatorial complexity, but same prop. delay critical path, only simpler circuits per bit if purely NMOS or PMOS! :)
I think the 1970s Intel were doing MOSFETs then?
Technically parity could become a stable value before the zero flag could! ;)
Oh but I did forget that a single multiple input NOR could be large but without exponential amounts of gates
Technically parity could become a stable value before the zero flag could! ;)
Oh but I did forget that a single multiple input NOR could be large but without exponential amounts of gates